Improving Transactional Memory Performance with Queued Locking

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Performance and Scalability
Microconference Session

One Line Summary

We present a new modified queued locking method that improves transactional memory technology (like Intel TSX), by using queued locking to adaptively control the number of threads doing speculative transaction for optimal performance.

Abstract

In most programs using transactional memory, the gain is poor if the critical section has the property that the probability of abort increases rapidly with number of speculative threads in the critical section. Such property will cause a logjam when just one or two aborts will pile up threads doing speculative execution, resulting in even more aborts, eventually preventing threads from making forward progress. We will discuss a modified queued locking method, which provide a self adaptive quota to control the number of threads we allow in subsequent retries. We will present improvements with test workloads running with Intel’s TSX transactional memory.

Tags

performance, scalability

Presentation Materials

slides
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Speaker

  • Tim Chen

    Intel

    Biography

    Tim works at Intel’s Opensource Technology Center on Linux performance. He is interested in enhancing Linux in the area of locks, scheduler, memory management and crypto library.