24–28 Aug 2020
US/Pacific timezone

IOASID API extensions for Intel Scalable IOV usages

26 Aug 2020, 07:40
20m
Microconference2/Virtual-Room (LPC Virtual)

Microconference2/Virtual-Room

LPC Virtual

150
VFIO/IOMMU/PCI MC VFIO/IOMMU/PCI MC

Speakers

Yi Liu Jacob Pan

Description

As it currently stands in the mainline kernel, IOASID is a generic kernel service that provides PCIe PASID or ARM SMMU sub-stream ID allocations. On VT-d and Intel's Scalable IO Virtualization(SIOV) platforms, IOASID core serves a particularly important role as its usage spans the following dimensions:
- bare metal and guest SVM
- A slew of in-kernel users consists of VFIO, IOMMU, mm, VDCM*, KVM

To fulfill the requirements of SIOV, we are proposing adding the following functionalities:
1. Extend IOASID set to support permission checking, token sharing, quota management
2. Add reference counting for life cycle management
3. Add per IOASID set the private ID for non-identity guest-host PASID mappings
4. Add notifiers to keep IOASID users synchronized on state change events, e.g. FREE, BIND/UNBIND, etc.

At LPC 2020. We are trying to get a consensus on the principles of these API extensions. If time permits, we would like to walk through the life-cycle of an IOASID on Intel's SIOV enabled platforms. Kernel documentation will be included in the patchset submission.

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